_ Git - BearSSL/blob - src/hash/ghash_pclmul.c

   1 /*
   2  * Copyright (c) 2017 Thomas Pornin <pornin@bolet.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining
   5  * a copy of this software and associated documentation files (the
   6  * "Software"), to deal in the Software without restriction, including
   7  * without limitation the rights to use, copy, modify, merge, publish,
   8  * distribute, sublicense, and/or sell copies of the Software, and to
   9  * permit persons to whom the Software is furnished to do so, subject to
  10  * the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be
  13  * included in all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  16  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  17  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  18  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  19  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  20  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  */
  24
  25 #include "inner.h"
  26
  27 /*
  28  * This is the GHASH implementation that leverages the pclmulqdq opcode
  29  * (from the AES-NI instructions).
  30  */
  31
  32 #if BR_AES_X86NI
  33
  34 #if BR_AES_X86NI_GCC
  35 /* #pragma GCC target "sse2,ssse3,pclmul" */
  36 #include <tmmintrin.h>
  37 #include <wmmintrin.h>
  38 #include <cpuid.h>
  39 #endif
  40
  41 #if BR_AES_X86NI_MSC
  42 #include <intrin.h>
  43 #endif
  44
  45 /*
  46  * GHASH is defined over elements of GF(2^128) with "full little-endian"
  47  * representation: leftmost byte is least significant, and, within each
  48  * byte, leftmost _bit_ is least significant. The natural ordering in
  49  * x86 is "mixed little-endian": bytes are ordered from least to most
  50  * significant, but bits within a byte are in most-to-least significant
  51  * order. Going to full little-endian representation would require
  52  * reversing bits within each byte, which is doable but expensive.
  53  *
  54  * Instead, we go to full big-endian representation, by swapping bytes
  55  * around, which is done with a single _mm_shuffle_epi8() opcode (it
  56  * comes with SSSE3; all CPU that offer pclmulqdq also have SSSE3). We
  57  * can use a full big-endian representation because in a carryless
  58  * multiplication, we have a nice bit reversal property:
  59  *
  60  *    rev_128(x) * rev_128(y) = rev_255(x * y)
  61  *
  62  * So by using full big-endian, we still get the right result, except
  63  * that it is right-shifted by 1 bit. The left-shift is relatively
  64  * inexpensive, and it can be mutualised.
  65  *
  66  *
  67  * Since SSE2 opcodes do not have facilities for shitfting full 128-bit
  68  * values with bit precision, we have to break down values into 64-bit
  69  * chunks. We number chunks from 0 to 3 in left to right order.
  70  */
  71
  72 /*
  73  * From a 128-bit value kw, compute kx as the XOR of the two 64-bit
  74  * halves of kw (into the right half of kx; left half is unspecified).
  75  */
  76 #define BK(kw, kx)   do { \
  77                 kx = _mm_xor_si128(kw, _mm_shuffle_epi32(kw, 0x0E)); \
  78         } while (0)
  79
  80 /*
  81  * Combine two 64-bit values (k0:k1) into a 128-bit (kw) value and
  82  * the XOR of the two values (kx).
  83  */
  84 #define PBK(k0, k1, kw, kx)   do { \
  85                 kw = _mm_unpacklo_epi64(k1, k0); \
  86                 kx = _mm_xor_si128(k0, k1); \
  87         } while (0)
  88
  89 /*
  90  * Left-shift by 1 bit a 256-bit value (in four 64-bit words).
  91  */
  92 #define SL_256(x0, x1, x2, x3)   do { \
  93                 x0 = _mm_or_si128( \
  94                         _mm_slli_epi64(x0, 1), \
  95                         _mm_srli_epi64(x1, 63)); \
  96                 x1 = _mm_or_si128( \
  97                         _mm_slli_epi64(x1, 1), \
  98                         _mm_srli_epi64(x2, 63)); \
  99                 x2 = _mm_or_si128( \
 100                         _mm_slli_epi64(x2, 1), \
 101                         _mm_srli_epi64(x3, 63)); \
 102                 x3 = _mm_slli_epi64(x3, 1); \
 103         } while (0)
 104
 105 /*
 106  * Perform reduction in GF(2^128). The 256-bit value is in x0..x3;
 107  * result is written in x0..x1.
 108  */
 109 #define REDUCE_F128(x0, x1, x2, x3)   do { \
 110                 x1 = _mm_xor_si128( \
 111                         x1, \
 112                         _mm_xor_si128( \
 113                                 _mm_xor_si128( \
 114                                         x3, \
 115                                         _mm_srli_epi64(x3, 1)), \
 116                                 _mm_xor_si128( \
 117                                         _mm_srli_epi64(x3, 2), \
 118                                         _mm_srli_epi64(x3, 7)))); \
 119                 x2 = _mm_xor_si128( \
 120                         _mm_xor_si128( \
 121                                 x2, \
 122                                 _mm_slli_epi64(x3, 63)), \
 123                         _mm_xor_si128( \
 124                                 _mm_slli_epi64(x3, 62), \
 125                                 _mm_slli_epi64(x3, 57))); \
 126                 x0 = _mm_xor_si128( \
 127                         x0, \
 128                         _mm_xor_si128( \
 129                                 _mm_xor_si128( \
 130                                         x2, \
 131                                         _mm_srli_epi64(x2, 1)), \
 132                                 _mm_xor_si128( \
 133                                         _mm_srli_epi64(x2, 2), \
 134                                         _mm_srli_epi64(x2, 7)))); \
 135                 x1 = _mm_xor_si128( \
 136                         _mm_xor_si128( \
 137                                 x1, \
 138                                 _mm_slli_epi64(x2, 63)), \
 139                         _mm_xor_si128( \
 140                                 _mm_slli_epi64(x2, 62), \
 141                                 _mm_slli_epi64(x2, 57))); \
 142         } while (0)
 143
 144 /*
 145  * Square value kw into (dw,dx).
 146  */
 147 #define SQUARE_F128(kw, dw, dx)   do { \
 148                 __m128i z0, z1, z2, z3; \
 149                 z1 = _mm_clmulepi64_si128(kw, kw, 0x11); \
 150                 z3 = _mm_clmulepi64_si128(kw, kw, 0x00); \
 151                 z0 = _mm_shuffle_epi32(z1, 0x0E); \
 152                 z2 = _mm_shuffle_epi32(z3, 0x0E); \
 153                 SL_256(z0, z1, z2, z3); \
 154                 REDUCE_F128(z0, z1, z2, z3); \
 155                 PBK(z0, z1, dw, dx); \
 156         } while (0)
 157
 158 /* see bearssl_hash.h */
 159 BR_TARGET("ssse3,pclmul")
 160 void
 161 br_ghash_pclmul(void *y, const void *h, const void *data, size_t len)
 162 {
 163         const unsigned char *buf1, *buf2;
 164         unsigned char tmp[64];
 165         size_t num4, num1;
 166         __m128i yw, h1w, h1x;
 167         __m128i byteswap_index;
 168
 169         /*
 170          * We split data into two chunks. First chunk starts at buf1
 171          * and contains num4 blocks of 64-byte values. Second chunk
 172          * starts at buf2 and contains num1 blocks of 16-byte values.
 173          * We want the first chunk to be as large as possible.
 174          */
 175         buf1 = data;
 176         num4 = len >> 6;
 177         len &= 63;
 178         buf2 = buf1 + (num4 << 6);
 179         num1 = (len + 15) >> 4;
 180         if ((len & 15) != 0) {
 181                 memcpy(tmp, buf2, len);
 182                 memset(tmp + len, 0, (num1 << 4) - len);
 183                 buf2 = tmp;
 184         }
 185
 186         /*
 187          * Constant value to perform endian conversion.
 188          */
 189         byteswap_index = _mm_set_epi8(
 190                 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15);
 191
 192         /*
 193          * Load y and h.
 194          */
 195         yw = _mm_loadu_si128(y);
 196         h1w = _mm_loadu_si128(h);
 197         yw = _mm_shuffle_epi8(yw, byteswap_index);
 198         h1w = _mm_shuffle_epi8(h1w, byteswap_index);
 199         BK(h1w, h1x);
 200
 201         if (num4 > 0) {
 202                 __m128i h2w, h2x, h3w, h3x, h4w, h4x;
 203                 __m128i t0, t1, t2, t3;
 204
 205                 /*
 206                  * Compute h2 = h^2.
 207                  */
 208                 SQUARE_F128(h1w, h2w, h2x);
 209
 210                 /*
 211                  * Compute h3 = h^3 = h*(h^2).
 212                  */
 213                 t1 = _mm_clmulepi64_si128(h1w, h2w, 0x11);
 214                 t3 = _mm_clmulepi64_si128(h1w, h2w, 0x00);
 215                 t2 = _mm_xor_si128(_mm_clmulepi64_si128(h1x, h2x, 0x00),
 216                         _mm_xor_si128(t1, t3));
 217                 t0 = _mm_shuffle_epi32(t1, 0x0E);
 218                 t1 = _mm_xor_si128(t1, _mm_shuffle_epi32(t2, 0x0E));
 219                 t2 = _mm_xor_si128(t2, _mm_shuffle_epi32(t3, 0x0E));
 220                 SL_256(t0, t1, t2, t3);
 221                 REDUCE_F128(t0, t1, t2, t3);
 222                 PBK(t0, t1, h3w, h3x);
 223
 224                 /*
 225                  * Compute h4 = h^4 = (h^2)^2.
 226                  */
 227                 SQUARE_F128(h2w, h4w, h4x);
 228
 229                 while (num4 -- > 0) {
 230                         __m128i aw0, aw1, aw2, aw3;
 231                         __m128i ax0, ax1, ax2, ax3;
 232
 233                         aw0 = _mm_loadu_si128((void *)(buf1 +  0));
 234                         aw1 = _mm_loadu_si128((void *)(buf1 + 16));
 235                         aw2 = _mm_loadu_si128((void *)(buf1 + 32));
 236                         aw3 = _mm_loadu_si128((void *)(buf1 + 48));
 237                         aw0 = _mm_shuffle_epi8(aw0, byteswap_index);
 238                         aw1 = _mm_shuffle_epi8(aw1, byteswap_index);
 239                         aw2 = _mm_shuffle_epi8(aw2, byteswap_index);
 240                         aw3 = _mm_shuffle_epi8(aw3, byteswap_index);
 241                         buf1 += 64;
 242
 243                         aw0 = _mm_xor_si128(aw0, yw);
 244                         BK(aw1, ax1);
 245                         BK(aw2, ax2);
 246                         BK(aw3, ax3);
 247                         BK(aw0, ax0);
 248
 249                         t1 = _mm_xor_si128(
 250                                 _mm_xor_si128(
 251                                         _mm_clmulepi64_si128(aw0, h4w, 0x11),
 252                                         _mm_clmulepi64_si128(aw1, h3w, 0x11)),
 253                                 _mm_xor_si128(
 254                                         _mm_clmulepi64_si128(aw2, h2w, 0x11),
 255                                         _mm_clmulepi64_si128(aw3, h1w, 0x11)));
 256                         t3 = _mm_xor_si128(
 257                                 _mm_xor_si128(
 258                                         _mm_clmulepi64_si128(aw0, h4w, 0x00),
 259                                         _mm_clmulepi64_si128(aw1, h3w, 0x00)),
 260                                 _mm_xor_si128(
 261                                         _mm_clmulepi64_si128(aw2, h2w, 0x00),
 262                                         _mm_clmulepi64_si128(aw3, h1w, 0x00)));
 263                         t2 = _mm_xor_si128(
 264                                 _mm_xor_si128(
 265                                         _mm_clmulepi64_si128(ax0, h4x, 0x00),
 266                                         _mm_clmulepi64_si128(ax1, h3x, 0x00)),
 267                                 _mm_xor_si128(
 268                                         _mm_clmulepi64_si128(ax2, h2x, 0x00),
 269                                         _mm_clmulepi64_si128(ax3, h1x, 0x00)));
 270                         t2 = _mm_xor_si128(t2, _mm_xor_si128(t1, t3));
 271                         t0 = _mm_shuffle_epi32(t1, 0x0E);
 272                         t1 = _mm_xor_si128(t1, _mm_shuffle_epi32(t2, 0x0E));
 273                         t2 = _mm_xor_si128(t2, _mm_shuffle_epi32(t3, 0x0E));
 274                         SL_256(t0, t1, t2, t3);
 275                         REDUCE_F128(t0, t1, t2, t3);
 276                         yw = _mm_unpacklo_epi64(t1, t0);
 277                 }
 278         }
 279
 280         while (num1 -- > 0) {
 281                 __m128i aw, ax;
 282                 __m128i t0, t1, t2, t3;
 283
 284                 aw = _mm_loadu_si128((void *)buf2);
 285                 aw = _mm_shuffle_epi8(aw, byteswap_index);
 286                 buf2 += 16;
 287
 288                 aw = _mm_xor_si128(aw, yw);
 289                 BK(aw, ax);
 290
 291                 t1 = _mm_clmulepi64_si128(aw, h1w, 0x11);
 292                 t3 = _mm_clmulepi64_si128(aw, h1w, 0x00);
 293                 t2 = _mm_clmulepi64_si128(ax, h1x, 0x00);
 294                 t2 = _mm_xor_si128(t2, _mm_xor_si128(t1, t3));
 295                 t0 = _mm_shuffle_epi32(t1, 0x0E);
 296                 t1 = _mm_xor_si128(t1, _mm_shuffle_epi32(t2, 0x0E));
 297                 t2 = _mm_xor_si128(t2, _mm_shuffle_epi32(t3, 0x0E));
 298                 SL_256(t0, t1, t2, t3);
 299                 REDUCE_F128(t0, t1, t2, t3);
 300                 yw = _mm_unpacklo_epi64(t1, t0);
 301         }
 302
 303         yw = _mm_shuffle_epi8(yw, byteswap_index);
 304         _mm_storeu_si128(y, yw);
 305 }
 306
 307 /*
 308  * Test CPU support for PCLMULQDQ.
 309  */
 310 static int
 311 pclmul_supported(void)
 312 {
 313         /*
 314          * Bit mask for features in ECX:
 315          *    1   PCLMULQDQ support
 316          */
 317 #define MASK   0x00000002
 318
 319 #if BR_AES_X86NI_GCC
 320         unsigned eax, ebx, ecx, edx;
 321
 322         if (__get_cpuid(1, &eax, &ebx, &ecx, &edx)) {
 323                 return (ecx & MASK) == MASK;
 324         } else {
 325                 return 0;
 326         }
 327 #elif BR_AES_X86NI_MSC
 328         int info[4];
 329
 330         __cpuid(info, 1);
 331         return ((uint32_t)info[2] & MASK) == MASK;
 332 #else
 333         return 0;
 334 #endif
 335
 336 #undef MASK
 337 }
 338
 339 /* see bearssl_hash.h */
 340 br_ghash
 341 br_ghash_pclmul_get(void)
 342 {
 343         return pclmul_supported() ? &br_ghash_pclmul : 0;
 344 }
 345
 346 #else
 347
 348 /* see bearssl_hash.h */
 349 br_ghash
 350 br_ghash_pclmul_get(void)
 351 {
 352         return 0;
 353 }
 354
 355 #endif